Nonvolatile SRAM

US10748602B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Huichu Liu · Santa Clara, US
• Sasikanth Manipatruni · Ithaca, US
• Daniel H. Morris · Hillsboro, US
• Kaushik Vaidyanathan · Santa Clara, US
• Niloy Mukherjee · Beaverton, US
• Dmitri E. Nikonov · معلمی نژاد, US
• Ian A. Young · Portland, US
• Tanay Karnik · Portland, US

Key dates

• Filing date: Mar 23, 2016
• Grant date: Aug 18, 2020
• Expiry date: Mar 23, 2036

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C2213/71
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

One embodiment provides an apparatus. The apparatus includes a pair of nonvolatile resistive random access memory (RRAM) memory cells coupled to a volatile static RAM (SRAM) memory cell. The pair of nonvolatile RRAM memory cells includes a first RRAM memory cell and a second RRAM memory cell. The first RRAM memory cell includes a first resistive memory element coupled to a first bit line, and a first selector transistor coupled between the first resistive memory element and a first output node of the volatile SRAM memory cell. The second RRAM memory cell includes a second resistive memory element coupled to a second bit line, and a second selector transistor coupled between the second resistive memory element and a second output node of the volatile SRAM memory cell.