Sasikanth Manipatruni
402Patents
16h-index
118Co-inventors
85Inventor score
Filing activity: Aug 24, 2007 → Dec 11, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10679782B2 | Spin logic with spin hall electrodes and charge interconnects | Electricity | 68 | Active |
| US10847201B2 | High-density low voltage non-volatile differential memory bit-cell with shared plate line | Physics | 63 | Active |
| US11482270B1 | Pulsing scheme for a ferroelectric memory bit-cell to minimize read or write disturb effect and refresh logic | Electricity | 62 | Active |
| US10944404B1 | Low power ferroelectric based majority logic gate adder | Electricity | 53 | Active |
| US11164976B2 | Doped polar layers and semiconductor device incorporating same | Electricity | 53 | Active |
| US11139270B2 | Artificial intelligence processor with three-dimensional stacked memory | Emerging Cross-Sectional Technologies | 46 | Active |
| US11043472B1 | 3D integrated ultra high-bandwidth memory | Emerging Cross-Sectional Technologies | 46 | Active |
| US10998025B2 | High-density low voltage non-volatile differential memory bit-cell with shared plate-line | Physics | 41 | Active |
| US11423967B1 | Stacked ferroelectric non-planar capacitors in a memory bit-cell | Electricity | 29 | Active |
| US11165430B1 | Majority logic gate based sequential circuit | Electricity | 26 | Active |
| US11152343B1 | 3D integrated ultra high-bandwidth multi-stacked memory | Emerging Cross-Sectional Technologies | 25 | Active |
| US11659714B1 | Ferroelectric device film stacks with texturing layer, and method of forming such | Electricity | 24 | Active |
| US11171115B2 | Artificial intelligence processor with three-dimensional stacked memory | Emerging Cross-Sectional Technologies | 22 | Active |
| US11694940B1 | 3D stack of accelerator die and multi-core processor die | Emerging Cross-Sectional Technologies | 21 | Active |
| US11277137B1 | Majority logic gate with non-linear input capacitors | Electricity | 19 | Active |
| US10951213B1 | Majority logic gate fabrication | Electricity | 17 | Active |
| US10642922B2 | Binary, ternary and bit serial compute-in-memory circuits | Physics | 15 | Active |
| US9391262B1 | Nanomagnetic devices switched with a spin hall effect | Electricity | 14 | Active |
| US9460768B2 | Cross point array MRAM having spin hall MTJ devices | Electricity | 13 | Active |
| US11398570B2 | Doped polar layers and semiconductor device incorporating same | Electricity | 12 | Active |
| US11289608B2 | Doped polar layers and semiconductor device incorporating same | Electricity | 11 | Active |
| US11283453B2 | Low power ferroelectric based majority logic gate carry propagate and serial adder | Electricity | 11 | Active |
| US11355643B2 | Doped polar layers and semiconductor device incorporating same | Electricity | 11 | Active |
| US11501813B1 | Method of forming stacked ferroelectric non- planar capacitors in a memory bit-cell | Electricity | 11 | Active |
| US10081887B2 | Electrically functional fabric for flexible electronics | Emerging Cross-Sectional Technologies | 11 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.