Breakpointing circuitry that evaluates breakpoint conditions while running clock to target circuit
US10754759B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2018 |
| Grant date | Aug 25, 2020 |
| Priority date | — |
| Expiry date | Aug 4, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3698
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An execution circuit inputs a plurality of data units, performs unit operations on the data units, and registers results of the unit operations in response to oscillations of a clock signal. A control circuit controls activation of the unit operations, and outputs a start signal to the execution circuit to activate each unit operation and/or a completion signal to indicate completion of each unit operation. A debug circuit stores breakpoint flags associated with the unit operations. Each breakpoint flag has a state that specifies whether to stop oscillations of the clock signal. The debug circuit further receives the start and/or completion signal and evaluates, while the clock signal oscillates to the execution circuit, a state of the start and/or completion signal and a state of the breakpoint flag associated with the unit operation. Oscillations of the clock signal are stopped in response to the evaluation of the signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.