Kumar Deepak
30Patents
8h-index
40Co-inventors
71Inventor score
Filing activity: Mar 14, 2003 → Mar 29, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7721090B1 | Event-driven simulation of IP using third party event-driven simulators | Physics | 21 | Active |
| US7403961B1 | Dangling reference detection and garbage collection during hardware simulation | Physics | 16 | Expired |
| US7194705B1 | Simulation of integrated circuitry within a high-level modeling system using hardware description language circuit descriptions | Physics | 13 | Expired |
| US7197445B1 | Atomic transaction processing for logic simulation | Physics | 13 | Expired |
| US8265918B1 | Simulation and emulation of a circuit design | Physics | 13 | Active |
| US9977758B1 | Device profiling for tuning OpenCL applications on programmable integrated circuits | Physics | 12 | Active |
| US8074077B1 | Securing circuit designs within circuit design tools | Physics | 10 | Active |
| US10671785B1 | Framework for reusing cores in simulation | Physics | 8 | Active |
| US7302377B1 | Accelerated event queue for logic simulation | Physics | 8 | Expired |
| US10296673B1 | Mixed-language simulation | Physics | 7 | Active |
| US8868396B1 | Verification and debugging using heterogeneous simulation models | Physics | 6 | Active |
| US10255400B1 | Debugging system and method | Physics | 6 | Active |
| US9223910B1 | Performance and memory efficient modeling of HDL ports for simulation | Physics | 6 | Active |
| US10437949B1 | Scheduling events in hardware design language simulation | Physics | 6 | Active |
| US8327311B1 | Generating a simulation model of a circuit design | Physics | 5 | Active |
| US10380313B1 | Implementation and evaluation of designs for heterogeneous computing platforms with hardware acceleration | Physics | 5 | Active |
| US8418095B1 | Compilation and simulation of a circuit design | Physics | 5 | Active |
| US10235272B2 | Debugging system and method | Physics | 3 | Active |
| US10067854B2 | System and method for debugging software executed as a hardware simulation | Physics | 3 | Active |
| US8838431B1 | Mixed-language simulation | Physics | 3 | Active |
| US7191412B1 | Method and apparatus for processing a circuit description for logic simulation | Physics | 2 | Expired |
| US10740210B1 | Kernel tracing for a heterogeneous computing platform and data mining | Physics | 1 | Active |
| US8131411B2 | Change over valve for a transition system | Physics | 1 | Active |
| US10621067B1 | Data unit breakpointing circuits and methods | Physics | 1 | Active |
| US10754759B1 | Breakpointing circuitry that evaluates breakpoint conditions while running clock to target circuit | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.