Analog method for programming a phase change memory cell by means of identical electrical pulses
US10755754B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2019 |
| Grant date | Aug 25, 2020 |
| Priority date | — |
| Expiry date | Mar 8, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for programming a phase change memory cell placed in an initial crystalline state, the memory cell being called of taking a plurality of resistance values belonging to a range of values called “programming window”, the method including parameterizing a lower limit of the programming window by applying to the memory cell a single gradual writing voltage pulse or a first series of identical gradual writing voltage pulses; progressively adjusting the resistance value of the memory cell by the following operations: a gradual erasing operation during which a series of identical gradual erasing voltage pulses is applied to the memory cell; a gradual writing operation during which a second series of identical gradual writing voltage pulses is applied to the memory cell; the gradual writing and gradual erasing voltage pulses have a width less than 50 ns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.