Method for manufacturing a semiconductor device
US10770293B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Aug 20, 2018 |
| Grant date | Sep 8, 2020 |
| Priority date | — |
| Expiry date | Aug 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/768
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of manufacturing a semiconductor device, a photo resist layer is formed over a substrate with underlying structures. The first photo resist layer is exposed to exposure radiation. The exposed first photo resist layer is developed with a developing solution. A planarization layer is formed over the developed photo resist layer. The underlying structures include concave portions, and a part of the concave portions is not filled by the developed first photo resist.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.