Patent · US Active

Chip scale package (CSP) including shim die

US10770364B2 · kind B2 · utility

0Cited by
1References
20Claims
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Assignee

Inventors

Key dates

Filing dateApr 12, 2018
Grant dateSep 8, 2020
Priority date
Expiry dateApr 12, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/3511
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Examples of the present disclosure provide example Chip Scale Packages (CSPs). In some examples, a structure includes a first integrated circuit die, a shim die that does not include active circuitry thereon, an encapsulant at least laterally encapsulating the first integrated circuit die and the shim die, and a redistribution structure on the first integrated circuit die, the shim die, and the encapsulant. The redistribution structure includes one or more metal layers electrically connected to the first integrated circuit die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.