Save-restore circuitry with metal-ferroelectric-metal devices
US10777250B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2018 |
| Grant date | Sep 15, 2020 |
| Priority date | — |
| Expiry date | Sep 27, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/221
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments include apparatuses, methods, and systems associated with save-restore circuitry including metal-ferroelectric-metal (MFM) devices. The save-restore circuitry may be coupled to a bit node and/or bit bar node of a pair of cross-coupled inverters to save the state of the bit node and/or bit bar node when an associated circuit block transitions to a sleep state, and restore the state of the bit node and/or bit bar node when the associated circuit block transitions from the sleep state to an active state. The save-restore circuitry may be used in a flip-flop circuit, a register file circuit, and/or another suitable type of circuit. The save-restore circuitry may include a transmission gate coupled between the bit node (or bit bar node) and an internal node, and an MFM device coupled between the internal node and a plate line. Other embodiments may be described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.