Semiconductor package with air cavity

US10777536B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Chau Fatt Chiang · Melaka City, MY
• April Coleen Tuazon Bernardez · Melaka City, MY
• Junny Abdul Wahid · Melaka City, MY
• Roslie Saini bin Bakar · Melaka City, MY
• Kon Hoe Chin · Pusing, MY
• Hock Heng Chong · Melaka City, MY
• Kok Yau Chua · Melaka City, MY
• Hsieh Ting Kuek · Melaka City, MY
• Chee Hong Lee · 流花街道, CN
• Soon Lee Liew · Ipoh, MY
• Nurfarena Othman · Melaka City, MY
• Pei Luan Pok · Melaka City, MY
• Werner Reiss · Bad Feilnbach, DE
• Stefan Helmut Schmalzl · Sauerlach, DE

Key dates

• Filing date: Dec 7, 2018
• Grant date: Sep 15, 2020
• Expiry date: Dec 7, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/15151
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.