Methods, systems, and computer program product for determining layout equivalence for a multi-fabric electronic design
US10783312B1 · kind B1 · utility
1Cited by
27References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 10, 2018 |
| Grant date | Sep 22, 2020 |
| Priority date | — |
| Expiry date | Oct 10, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are methods, systems, and articles of manufacture for determining layout equivalence between a plurality of versions of a single layout of a multi-fabric electronic design. These techniques identify a first version and a second version of a layout of an electronic design that spans across multiple design fabrics. One or more collaborative comparator modules are executed to determine whether the first version is identical to or different from the second version of the layout. These techniques further modify the first version or the second version of the layout with discrepancy annotation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.