Method for manufacturing semiconductor device with through silicon via structure
US10784185B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2019 |
| Grant date | Sep 22, 2020 |
| Priority date | — |
| Expiry date | Dec 3, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06541
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes at least one wafer and at least one TSV (through silicon via) structure. The at least one wafer each includes a substrate, an isolation structure, and a conductive pad. The isolation structure is formed in the substrate and extends from a first side of the substrate toward a second side opposite to the first side of the substrate. The conductive pad is formed at a dielectric layer disposed on the first side of the substrate, wherein the conductive pad is electrically connected to an active area in the substrate. The at least one TSV structure penetrates the at least one wafer. The conductive pad contacts a sidewall of the at least one TSV structure, and electrically connects the at least one TSV structure and the active area in the substrate. The isolation structure separates from and surrounds the at least one TSV structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.