Memory device and method for assiting read operation
US10790007B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2019 |
| Grant date | Sep 29, 2020 |
| Priority date | — |
| Expiry date | Nov 22, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/07
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device and a method of assisting a read operation in the memory device are introduced. The memory device may include a logic circuit, a charge pump, a switch and a sense amplifier. The logic circuit is configured to receive at least one input signal and perform a logic operation on the at least one input signal to output an enable signal. The charge pump is coupled to the logic circuit and is configured to generate a boost voltage according to the enable signal. The switch is coupled between the charge pump and a sensing power supply line, and is configured to control an electrical connection between the charge pump and the sensing power supply line according to the enable signal to supply the boost voltage to the sensing power supply line. The sense amplifier is configured to perform a read operation using the boost voltage from the sensing power supply line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.