High temperature ultra-fast annealed soft mask for semiconductor devices
US10804106B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2018 |
| Grant date | Oct 13, 2020 |
| Priority date | — |
| Expiry date | May 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Techniques for providing a high temperature soft mask for semiconductor devices are described. In an embodiment, spin coating semiconductor device components with organic planarization material having a defined aromatic content aromatic content to provide an organic planarization layer. The method can further comprise ultra-fast annealing the organic planarization layer and forming an implanted or doped region in the semiconductor device. Three-dimensional FinFET components of a device can be spin coated with organic planarization material having high aromatic content, with the device cured at a first temperature. The organic planarization layer can be ultra-fast annealed at a second temperature that is greater than the first temperature. Aspects can include patterning the device, and forming an implanted or doped region in a semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.