Integrated circuit chip with a vertical connector
US10804185B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2015 |
| Grant date | Oct 13, 2020 |
| Priority date | — |
| Expiry date | Feb 1, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) chip can include a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip. The IC chip can also include an encapsulating material molded over the die and the leadframe. The encapsulating material can form another surface of the IC chip. The other surface of the IC chip opposes the given surface of the IC chip. The IC chip can further include a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip. The vertical connector can be coupled to the interconnect on the die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.