EMI shielding for flip chip package with exposed die backside
US10804217B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 2019 |
| Grant date | Oct 13, 2020 |
| Priority date | — |
| Expiry date | Aug 1, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a substrate and a semiconductor die disposed over the substrate. An encapsulant is deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant. A first shielding layer is formed over the semiconductor die. In some embodiments, the first shielding layer includes a stainless steel layer in contact with the surface of the semiconductor die and a copper layer formed over the stainless steel layer. The first shielding layer may further include a protective layer formed over the copper layer. One embodiment has a heatsink bonded to the semiconductor die through a solder layer. A second shielding layer can be formed over a side surface of the semiconductor die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.