Techniques for forming low stress etch-resistant mask using implantation

US10811257B2 · kind B2 · utility

Assignee

• Varian Semiconductor Equipment Associates, Inc. · US

Inventors

• Rajesh Prasad · Lexington, US
• Tzu-Yu Liu · San Jose, US
• Kyu-Ha Shim · Andover, US
• Tom Ho Wing Yu · Campbell, US
• Zhong Qiang Hua · San Jose, US
• Adolph Miller Allen · Oakland, US
• Viabhav Soni · Sunnyvale, US
• Ravi Rajagopalan · Cary, US
• Nobuyuki Sasaki · Santa Clara, US

Key dates

• Filing date: Jun 4, 2018
• Grant date: Oct 20, 2020
• Expiry date: Jun 4, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/31155
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method may include depositing a carbon layer on a substrate using physical vapor deposition, wherein the carbon layer exhibits compressive stress, and is characterized by a first stress value; and directing a dose of low-mass species into the carbon layer, wherein, after the directing, the carbon layer exhibits a second stress value, less compressive than the first stress value.