Devices employing thermal and mechanical enhanced layers and methods of forming same
US10811394B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2019 |
| Grant date | Oct 20, 2020 |
| Priority date | — |
| Expiry date | Jul 1, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes attaching a first-level device die to a dummy die, encapsulating the first-level device die in a first encapsulating material, forming through-vias over and electrically coupled to the first-level device die, attaching a second-level device die over the first-level device die, and encapsulating the through-vias and the second-level device die in a second encapsulating material. Redistribution lines are formed over and electrically coupled to the through-vias and the second-level device die. The dummy die, the first-level device die, the first encapsulating material, the second-level device die, and the second encapsulating material form parts of a composite wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.