Two step fin etch and reveal for VTFETs and high breakdown LDVTFETs

US10811528B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Mona A. Ebrish · Albany, US
• Xuefeng Liu · Gaithersburg, US
• Brent A. Anderson · Jericho, US
• Huiming Bu · Millwood, US
• Junli Wang · Slingerlands, US

Key dates

• Filing date: Mar 21, 2018
• Grant date: Oct 20, 2020
• Expiry date: Mar 21, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0128

Abstract

High breakdown voltage devices are provided. In one aspect, a method of forming a device having a VTFET and a LDVTFET includes: forming a LDD in an LDVTFET region; patterning fin(s) in a VTFET region to a depth D1; patterning fin(s) in the LDVTFET region, through the LDD, to a depth D2>D1; forming bottom source/drains at a base of the VTFET/LDVTFET fins; burying the VTFET/LDVTFET fins in a gap fill dielectric; recessing the gap fill dielectric to full expose the VTFET fin(s) and partially expose the LDVTFET fin(s); forming bottom spacers directly on the bottom source/drains in the VTFET region and directly on the gap fill dielectric in the LDVTFET region; forming gates alongside the VTFET/LDVTFET fins; forming top spacers above the gates; and forming top source/drains above the top spacers. A one-step fin etch and devices having VTFET and long channel VTFETs are also provided.