Method for forming a semiconductor structure
US10818556B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2018 |
| Grant date | Oct 27, 2020 |
| Priority date | — |
| Expiry date | Jan 17, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0274
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor structure is provided. Multiple fins extending along a first direction are formed in a semiconductor substrate. The multiple fins includes a group of active fins, a pair of protection fins sandwiching about the group the active fins, and at least one dummy fin around the pair of protection fins. A fin cut process is performed to remove the at least one dummy fin around the pair of protection fins. After performing the fin cut process, trench isolation structures are formed within the trenches between the multiple fins. The trench isolation structures are subjected to an anneal process. After annealing the trench isolation structures, the pair of protection fins is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.