DFE conditioning for write operations of a memory device
US10825494B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2019 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Nov 13, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and devices include an input buffer configured to receive data. Decision feedback equalizer (DFE) circuitry includes a DFE configured to interpret levels of the data from the input buffer and a DFE buffer that stores previous values to control the DFE based on the previous values. Moreover, the DFE circuitry also includes reset circuitry configured to reset the DFE buffer to an initial state. Furthermore, the DFE circuitry includes suppression circuitry configured to suppress resets using the reset circuitry for an interval between write operations to the memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.