Semiconductor die with improved ruggedness

US10840162B2 · kind B2 · utility

Assignee

• Cree, Inc. · US

Inventors

• Chris Hardiman · Morrisville, US
• Kyoung-Keun Lee · Cary, US
• Fabian Radulescu · Chapel Hill, US
• Daniel Namishia · Wake Forest, US
• Scott Sheppard · Chapel Hill, US

Key dates

• Filing date: May 1, 2019
• Grant date: Nov 17, 2020
• Expiry date: May 1, 2039

Classification

• Technology area (CPC —): General

Abstract

A semiconductor die includes a substrate, a first passivation layer over the substrate, and a second passivation layer over the first passivation layer and the substrate. The substrate has boundaries defined by a substrate termination edge. The first passivation layer is over the substrate such that it terminates at a first passivation termination edge that is inset from the substrate termination edge by a first distance. The second passivation layer is over the first passivation layer and the substrate such that it terminates at a second passivation termination edge that is inset from the substrate termination edge by a second distance. The second distance is less than the first distance such that the second passivation layer overlaps the first passivation layer.