Methods of forming self-aligned vias and air gaps

US10840186B2 · kind B2 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Susmit Singha Roy · Mountain View, US
• Ziqing Duan · Sunnyvale, US
• Abhijit Basu Mallick · Palo Alto, US
• Praburam Gopalraja · San Jose, US

Key dates

• Filing date: Jul 25, 2019
• Grant date: Nov 17, 2020
• Expiry date: Jul 25, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76883
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A first metallization layer comprises a set of first conductive lines that extend along a first direction on a first dielectric layer on a substrate. Pillars are formed on recessed first dielectric layers and a second dielectric layer covers the pillars. A dual damascene etch provides a contact hole through the second dielectric layer and an etch removes the pillars to form air gaps.