Semiconductor device and method for fabricating the same
US10840432B2 · kind B2 · utility
6Cited by
4References
7Claims
0Family size
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Key dates
| Filing date | Nov 26, 2018 |
| Grant date | Nov 17, 2020 |
| Priority date | — |
| Expiry date | Nov 26, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method for fabricating semiconductor device includes the steps of: forming an inter-metal dielectric (IMD) layer on a substrate; forming a metal interconnection in the IMD layer; forming a bottom electrode layer on the IMD layer, wherein the bottom electrode layer comprises a gradient concentration; forming a free layer on the bottom electrode layer; forming a top electrode layer on the free layer; and patterning the top electrode layer, the free layer, and the bottom electrode layer to form a magnetic tunneling junction (MTJ).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.