Semiconductor device and operating method of a semiconductor device
US10847226B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2018 |
| Grant date | Nov 24, 2020 |
| Priority date | — |
| Expiry date | Jan 29, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a memory string coupled between a common source line and a bit line, the memory string including at least one first selection transistor, a plurality of memory cells, and a plurality of second selection transistors. The semiconductor device also includes selection lines respectively coupled to the second selection transistors. The semiconductor device further includes a control logic circuit configured to float a first group of selection lines from among the selection lines at a first time and configured to float a second group of selection lines from among the selection lines at a second time different from the first time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.