Method and apparatus for supporting speculative memory optimizations
US10853078B2 · kind B2 · utility
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Key dates
| Filing date | Dec 21, 2018 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | Feb 5, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor includes a store buffer to store store instructions to be processed to store data in main memory, a load buffer to store load instructions to be processed to load data from main memory, and a loop invariant code motion (LICM) protection structure coupled to the store buffer and the load buffer. The LPT tracks information to compare an address of a store or snoop microoperation with entries in the LICM and re-loads a load microoperation of a matching entry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.