Compute optimizations for low precision machine learning operations
US10853906B2 · kind B2 · utility
2Cited by
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20Claims
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Key dates
| Filing date | Nov 21, 2018 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | Nov 21, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment provides an accelerator module comprising a memory stack including multiple memory dies; a graphics processing unit (GPU) coupled with the memory stack via one or more memory controllers, the GPU including a plurality of multiprocessors having a single instruction, multiple thread (SIMT) architecture, the multiprocessors to execute at least one single instruction. The at least one single instruction is to cause at least a portion of the GPU to perform a floating point operation on input having differing precisions. The floating point operation is a two-dimensional matrix multiply and accumulate operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.