Metal recess for semiconductor structures
US10854426B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 8, 2018 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | Nov 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Exemplary methods for laterally etching tungsten may include flowing an oxygen-containing precursor into a semiconductor processing chamber. A substrate positioned within the semiconductor processing chamber may include a trench formed between two vertical columns and tungsten slabs arranged within a plurality of recesses defined by at least one of the two vertical columns. At least two of the tungsten slabs may be connected by tungsten lining a portion of sidewalls of the trench. The methods may further include oxidizing the tungsten connecting the at least two of the tungsten slabs with the oxygen-containing precursor. The methods may include flowing a halide precursor into the semiconductor processing chamber. The methods may also include laterally etching the oxidized tungsten from the sidewalls of the trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.