Method for forming trench structure of semiconductor device
US10854713B2 · kind B2 · utility
0Cited by
31References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 8, 2018 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | Jul 21, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/215
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes forming a flowable dielectric layer in a trench of a substrate; curing the flowable dielectric layer; and annealing the cured flowable dielectric layer to form an insulation structure and a liner layer. The insulation structure is formed in the trench, the liner layer is formed between the insulation structure and the substrate, and the liner layer includes nitrogen.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.