Patent · US Active

Molded semiconductor package having a package-in-package structure and methods of manufacturing thereof

US10861828B2 · kind B2 · utility

0Cited by

13References

18Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Hui Teng Wang · Muar, MY
Swain Hong Yeo · Singapore, SG

Key dates

Filing date	Jul 24, 2019
Grant date	Dec 8, 2020
Priority date	—
Expiry date	Jul 24, 2039

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/181
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. An electrically insulative spacer separates the first and the second leadframe assemblies from one another. A mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the electrically insulative spacer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.