Multi-resolution image plane rendering within an improved graphics processor microarchitecture
US10867427B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2019 |
| Grant date | Dec 15, 2020 |
| Priority date | — |
| Expiry date | Sep 11, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2210/56
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing system to obtain an output includes a multi-plane rendering module includes a renderer receives a plurality of graphical objects to generate one or more image planes of object data, a resampler upscales lower resolution image planes to a higher resolution used by the output image, and a rasterizer combine pixels from a common location in the plurality of image planes after each image plane is upsampled to the higher resolution. The renderer receives one of the graphical objects having a location value along a z-axis of the scene, determines which of a plurality of image planes the graphical objects is located using the z-axis location for the graphical object, each of the planes possess a corresponding image resolution, and renders the graphical object into the image plane at the image resolution corresponding determined image plane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.