Dual nitride stressor for semiconductor device and method of manufacturing
US10872893B2 · kind B2 · utility
1Cited by
18References
20Claims
0Family size
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Key dates
| Filing date | Oct 28, 2019 |
| Grant date | Dec 22, 2020 |
| Priority date | — |
| Expiry date | Oct 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
A method for manufacturing a semiconductor device includes forming a fin structure over a substrate and forming a first gate structure over a first portion of the fin structure. A first nitride layer is formed over a second portion of the fin structure. The first nitride layer is exposed to ultraviolet radiation. Source/drain regions are formed at the second portion of the fin structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.