Methods and memory systems for address mapping
US10884947B2 · kind B2 · utility
5Cited by
2References
18Claims
0Family size
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Key dates
| Filing date | Nov 16, 2018 |
| Grant date | Jan 5, 2021 |
| Priority date | — |
| Expiry date | Nov 16, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems are provided for an address mapping scheme using a hash table. A controller of a memory system partitions a plurality of physical blocks included in a memory device into a plurality of data blocks and a plurality of log blocks, translates a logical address to a physical address based on a block-level mapping scheme or a page-level mapping scheme using a hash table, and performs a read and/or write operation based on the translated physical address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.