Fin-based fill cell optimization
US10885260B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2019 |
| Grant date | Jan 5, 2021 |
| Priority date | — |
| Expiry date | Sep 4, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems and computer program products for providing fin-based fill cell optimization are provided. Aspects include receiving a semiconductor layout comprising at least a first logic cell, a second logic cell, and a fill cell. A left boundary of the fill cell is adjacent to the first logic cell and a right boundary of the fill cell is adjacent to the second logic cell. Aspects also include determining a number of active left fins, right fins, and active fill cell fins associated with FinFET structures of the first logic cell, second logic cell and fill cell, respectively. Aspects also include comparing the number of active fins to a set of fin rules. Responsive to determining that the semiconductor layout violates the set of fin rules, aspects include modifying the semiconductor layout to change the number of active fill cell fins to satisfy the set of fin rules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.