Apparatuses and methods for semiconductor devices including clock signal lines
US10885959B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2019 |
| Grant date | Jan 5, 2021 |
| Priority date | — |
| Expiry date | Oct 2, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16251
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatuses for providing a clock signal for a semiconductor device are described. An example apparatus includes a chip including a first clock tree and a second clock tree. The first clock tree includes a first wiring segment extending in a first direction and a second wiring segment extending in a second direction perpendicular to the first direction and coupled the first wiring segment. The second clock tree includes a third wiring segment extending in the second direction, a fourth wiring segment extending in the first direction and coupled to the third wiring segment, and a fifth wiring segment extending in the second direction and coupled to the fourth wiring segment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.