Package structure and fabrication methods
US10886232B2 · kind B2 · utility
11Cited by
138References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2020 |
| Grant date | Jan 5, 2021 |
| Priority date | — |
| Expiry date | Jan 17, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1476
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.