Semiconductor memory device and method of controlling the same
US10896733B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 2019 |
| Grant date | Jan 19, 2021 |
| Priority date | — |
| Expiry date | Sep 6, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3472
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device comprises: a memory transistor; a first wiring connected to a gate electrode of the memory transistor; and a control device that executes a read operation to read data of the memory transistor and a write operation to write data in the memory transistor. In the read operation or the write operation, the control device: increases a voltage of the first wiring to a first voltage from a first timing to a second timing; and adjusts a length from the first timing to the second timing corresponding to at least one of a voltage of the first wiring, a current of the first wiring, and an amount of charge flowed through the first wiring.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.