Silicon residue removal in nanosheet transistors
US10896816B2 · kind B2 · utility
2Cited by
10References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2017 |
| Grant date | Jan 19, 2021 |
| Priority date | — |
| Expiry date | Sep 26, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a nanosheet semiconductor device includes forming a nanosheet stack comprising channel nanosheets. The method includes depositing silicon on the nanosheet stack, the silicon completely filling a space between adjacent channel nanosheets. The method includes etching the silicon. The method includes exposing the nanosheet stack to a gas phase heat treatment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.