Read retry with targeted auto read calibrate
US10915395B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2018 |
| Grant date | Feb 9, 2021 |
| Priority date | — |
| Expiry date | Jan 9, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/42
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various examples are directed to systems and methods for reading a memory component. A processing device may receive an indication that a read operation at a physical address of the memory component failed. The processing device may execute a plurality of read retry operations at the physical address. The processing device may access a first syndrome weight describing a first error correction operation performed on a result of a first read retry operation of the plurality of read retry operations and a second syndrome weight describing a second error correction operation performed on a result of a second read retry operation of the plurality of read retry operations. The processing device may select a first threshold voltage associated with the first read retry operation based at least in part on the first syndrome weight and the second syndrome weight. The processing device may also execute a first auto read calibrate operation at the physical address, the first auto read calibrate operation having a baseline at the first threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.