Method of fabricating a flash memory
US10916634B2 · kind B2 · utility
0Cited by
1References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 20, 2019 |
| Grant date | Feb 9, 2021 |
| Priority date | — |
| Expiry date | May 20, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/696
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device includes forming a memory gate and a hard mask layer on the memory gate, forming a select gate on a sidewall of the memory gate and the hard mask layer, performing a selective oxidation process to form an oxide layer on the hard mask layer and the select gate, wherein a portion of the oxide layer on the select gate is thicker than a portion of the oxide layer on the hard mask layer, and removing the oxide layer on the hard mask layer and the hard mask layer to expose a top surface of the memory gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.