Implementing interrupt remapping via input/output memory management unit faults
US10922253B1 · kind B1 · utility
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20Claims
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Key dates
| Filing date | Oct 22, 2019 |
| Grant date | Feb 16, 2021 |
| Priority date | — |
| Expiry date | Oct 22, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1668
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are various embodiments for software-based interrupt remapping. A memory address for a respective interrupt request of the peripheral device is allocated. The peripheral device is then configured to write to the memory address to raise an interrupt with the processor. Later, it can be determined that the peripheral device has attempted to write to the memory address. In response, an interrupt can be raised for the respective interrupt request with the processor of the computing device on behalf of the peripheral device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.