Semiconductor device
US10923599B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 2019 |
| Grant date | Feb 16, 2021 |
| Priority date | — |
| Expiry date | May 9, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
Abstract
A semiconductor device includes a buried dielectric layer, a first gate structure, a second gate structure, a first source/drain region, a second source/drain region, a first contact structure and a second contact structure. The first gate structure and the second gate structure disposed respectively in the front-side and backside of the dielectric layer, the first source/drain region and the second source/drain region are disposed between the first gate structure and the second gate structure, the first contact structure is disposed in the front-side of the dielectric layer and electrically coupled to the first source/drain region, the second contact structure is disposed in the backside of the dielectric layer and electrically coupled to the second source/drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.