Interruption of program operations at a memory sub-system
US10929056B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2018 |
| Grant date | Feb 23, 2021 |
| Priority date | — |
| Expiry date | Apr 2, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0679
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A read operation can be received while one or more program operations are being performed at a memory sub-system. In response to receiving the read operation, the one or more program operations being performed at the memory sub-system can be interrupted. Context data associated with the one or more interrupted program operations can be determined and the context data can be provided to a firmware associated with the memory sub-system. A control sequence can be received from the firmware based on the context data. The read operation can be performed and the one or more interrupted program operations can be resumed based on the control sequence from the firmware.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.