Row dependent sensing in nonvolatile memory
US10930355B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2019 |
| Grant date | Feb 23, 2021 |
| Priority date | — |
| Expiry date | Jun 5, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A methodology and structure for accounting for fabrication difference in memory holes is described. Increasing the distance of the memory holes from the sources of etchant or other fabrication material results in different characteristics of the memory from the outer memory holes to the inner memory holes. These difference can be accounted for by grouping the memory holes and altering the parameters of the program or verify operations based on the groupings. The bitline voltage for the inner grouping can be less than the bitline voltage for the outer groupings. The sense timing can be greater for the outer groupings relative to the inner groupings. This can result in voltage threshold for the inner groupings and outer groupings overlying each other to improve memory performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.