Patent · US Active

Retention aware block mapping in flash-based solid state drives

US10949113B2 · kind B2 · utility

3Cited by
14References
20Claims
0Family size

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Key dates

Filing dateSep 20, 2018
Grant dateMar 16, 2021
Priority date
Expiry dateSep 20, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7201
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Techniques for profiling storage blocks in non-transitory memory (e.g., flash memory dies) to determine their retention capability, and assigning them with labels based on retention, are described. A superblock (SB) can be formed from physical blocks with the same labels located in different dies. The disclosed system and methods improve storage efficiency when the update frequency of stored data is non-uniform, as is typically the case. Moreover, the disclosed embodiments improve the reliability of solid state drives (SSDs), as well as reduce data refresh frequency and write amplification due to periodic refresh. A storage system can comprise a controller configured to obtain expected retention times for a plurality of storage blocks. The controller can partition the blocks into superblocks based on the retention times. A respective superblock is associated with a superblock retention time range, and contains blocks having expected retention times within the retention time range.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.