Semiconductor device
US10950289B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 2019 |
| Grant date | Mar 16, 2021 |
| Priority date | — |
| Expiry date | May 14, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/783
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device according to an aspect of the present invention has: a plurality of memory cells MC; a plurality of word lines WL each coupled to a corresponding one of the plurality of memory cells MC; and a control circuit that intermittently monitors accesses to the plurality of word lines WL, stores/erases some captured row-addresses in a first number of registers, and detects, by comparison with stored addresses, in response to a first number of accesses to one of the word lines WL in a first period of time. According to the present invention, access histories can be precisely analyzed by a small-scale circuit configuration, and measures against, for example, the Row Hammer problem, etc. can be taken.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.