Low-k feature formation processes and structures formed thereby
US10950431B2 · kind B2 · utility
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5References
19Claims
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Key dates
| Filing date | May 24, 2019 |
| Grant date | Mar 16, 2021 |
| Priority date | — |
| Expiry date | May 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0158
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.