Assemblies having conductive structures with three or more different materials
US10957775B2 · kind B2 · utility
2Cited by
2References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2019 |
| Grant date | Mar 23, 2021 |
| Priority date | — |
| Expiry date | Jul 1, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/35
Abstract
Some embodiments include a memory array having a vertical stack of alternating insulative levels and control gate levels. Channel material extends vertically along the stack. The control gate levels comprising conductive regions. The conductive regions include at least three different materials. Charge-storage regions are adjacent the control gate levels. Charge-blocking regions are between the charge-storage regions and the conductive regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.