Semiconductor device for performing sum-of-product computation and operating method thereof
US10970044B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 2019 |
| Grant date | Apr 6, 2021 |
| Priority date | — |
| Expiry date | Dec 11, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device for performing a sum-of-product computation and an operating method thereof are provided. The semiconductor device includes an inputting circuit, a scaling circuit, a computing memory and an outputting circuit. The inputting circuit is used for receiving a plurality of inputting signals. The inputting signals are voltages or currents. The scaling circuit is connected to the inputting circuit for transforming the inputting signals to be a plurality of compensated signals respectively. The compensated signals are voltages or currents. The computing memory is connected to the scaling circuit. The computing memory includes a plurality of computing cells and the compensated signals are applied to the computing cells respectively. The outputting circuit is connected to the computing memory for reading an outputting signals of the computing cells. The outputting signal is voltage or current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.