Magnetoresistive random access memory having a ring of magnetic tunneling junction region surrounding an array region
US10971676B2 · kind B2 · utility
3Cited by
1References
18Claims
0Family size
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Key dates
| Filing date | Dec 31, 2019 |
| Grant date | Apr 6, 2021 |
| Priority date | — |
| Expiry date | Dec 31, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate having an array region defined thereon, a ring of magnetic tunneling junction (MTJ) region surrounding the array region, wherein the ring of MTJ region comprises a first MTJ, and metal interconnect patterns overlapping part of the ring of MTJ region. Preferably, each of the metal interconnect patterns includes a first metal interconnection connected to the first MTJ directly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.