Fill process optimization using feature scale modeling
US10977405B2 · kind B2 · utility
3Cited by
34References
20Claims
0Family size
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Key dates
| Filing date | Jan 29, 2019 |
| Grant date | Apr 13, 2021 |
| Priority date | — |
| Expiry date | Jan 29, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76883
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided herein are systems and methods for optimizing feature fill processes. The feature fill optimization systems and methods may be used to optimize feature fill from a small number of patterned wafer tests. The systems and methods may be used for optimizing enhanced feature fill processes including those that include inhibition and/or etch operations along with deposition operations. Results from experiments may be used to calibrate a feature scale behavioral model. Once calibrated, parameter space may be iteratively explored to optimize the process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.